0 or 2 credits
Fall 2026 Laboratory Lecture Distance Learning Upper Division
Introduction to standard cell design of Application Specific Integrated Circuits (ASICs) using modern hardware description languages (HDLs). Emphasis on how to write HDL code that will map readily to hardware. Laboratory experiments using commercial grade computer-aided design (CAD) tools for HDL based design, logic simulation, automatic placement and routing, timing analysis and verification.
Learning Outcomes1Design combinational and sequential logic in a variety of styles and awareness of resource usage.
2Use, modify, create scripts to control logic synthesis.
3Create a test bench and use it to verify a design that incorporates multiple sequential blocks.
4Place, route, and verify timing of an ASIC design.
5Determine the RTL architecture implied by HDL code of moderate complexity.
6Explain the difference between various ASIC and digital system design approaches - standard cell, full custom, and programmable device.
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